Baya Systems and Openchip Partner on RISC-V AI 

Baya Systems and Openchip have announced a strategic partnership focused on developing next-generation AI and high-performance computing systems built around advanced data movement architectures. Under the agreement, Openchip has licensed Baya Systems’ WeaveIP™ fabric technology and Network-on-Chip (NoC) platform to support the development of RISC-V-based multi-chiplet AI compute platforms optimized for increasingly demanding intelligent compute workloads.

The partnership addresses a growing challenge in AI system design: moving data efficiently between processors, memory, accelerators, and chiplets. As AI models continue to grow in size and complexity, system performance is increasingly constrained by data movement rather than raw compute capability. Openchip will use Baya’s software-driven WeaverPro™ FabricStudio platform to model, simulate, and optimize interconnect architectures early in the design cycle, helping improve power-performance-area (PPA) efficiency while reducing development risk and accelerating time-to-market.

The companies said the collaboration also reinforces their support for the open RISC-V ecosystem. Openchip is developing a portfolio of RISC-V-based accelerators, infrastructure hardware, and software platforms for AI and HPC applications, while Baya provides interconnect technology designed for chiplet-based architectures. The partnership expands Baya’s presence in Europe following the opening of its Cambridge, UK office and supports Openchip’s broader effort to develop European AI computing technologies across its operations in Spain, Italy, Poland, France, Germany, and Ireland.

• Openchip licensed Baya Systems’ WeaveIP™ interconnect platform.
• Partnership focuses on AI and HPC compute architectures.
• Supports development of RISC-V-based multi-chiplet systems.
• Baya’s WeaverPro™ platform enables early design optimization.
• Goal is to improve power, performance, scalability, and development efficiency.
• Addresses growing AI data movement and memory bottlenecks.
• Supports expansion of the European RISC-V ecosystem.
• Collaboration targets next-generation AI accelerator platforms.

“The fundamental challenges facing AI hardware today—scalability, thermal efficiency and uncompromised performance—cannot be solved if interconnect is treated as an afterthought. The communication layer between memory and compute is the critical connective tissue of the AI stack,” said Dr. Sailesh Kumar, CEO and founder of Baya Systems.

🌐 Analysis

As AI workloads scale, data movement has emerged as one of the most important architectural challenges in modern computing systems. The industry frequently refers to this problem as the “memory wall,” where the cost, latency, and energy required to move data increasingly limit overall system performance. As a result, interconnect technologies, memory hierarchies, and chiplet fabrics are becoming as strategically important as processor cores themselves.

Baya Systems focuses on a segment of the semiconductor market that has gained prominence with the rise of chiplet-based architectures. Rather than building increasingly large monolithic chips, many AI system developers are moving toward modular chiplet designs that require sophisticated fabrics to connect compute, memory, networking, and accelerator resources. This trend is visible across the industry in initiatives from AMD, Intel, NVIDIA, Marvell, Broadcom, and numerous AI silicon startups.

The partnership is also notable from a European semiconductor perspective. Openchip is positioning itself as part of Europe’s effort to develop sovereign AI computing technologies built around open RISC-V architectures. Combined with growing European investments in AI infrastructure, advanced packaging, semiconductor design, and HPC systems, the collaboration reflects broader regional efforts to strengthen local capabilities in strategic computing technologies.