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PhotonIC Launches ROCS Platform to Qualify Optoelectronic ICs 

Singapore-based PhotonIC Technologies introduced a product portfolio built on its Resiliency of Optoelectronic Chip Supply-Chain (ROCS) platform, positioning the approach as a way for module and system vendors to diversify manufacturing across multiple CMOS and SiGe processes and multiple foundry regions.  

The company says ROCS is designed to let customers tune performance, power, customization, and cost while reducing dependency on any single process node, geography, or supplier. PhotonIC also said it has more than 70 patents and has shipped more than 40 million ICs, with design wins that it expects to total 100 million cumulative units through 2027.  

PhotonIC plans live demos at OFC 2026 in Los Angeles (March 17–19) at Booth #5616, aligning its roadmap with 400G/800G/1.6T optical interconnect buildouts and emerging co-packaged optics architectures.  

“Process, manufacturing, and supply-chain strategy can no longer be treated separately,” said Dr. Frank Shi, CEO of PhotonIC Technologies. “Our ROCS platform integrates scalable, low-power CMOS with high-performance SiGe across multi-region manufacturing partnerships, strenghtening supply resilience and giving customers confidence in on-time, on-budget delivery, and long-term scalability.”  

🌐 Analysis: PhotonIC is essentially productizing “multi-fab portability” for optoelectronic IC building blocks—VCSEL/DML drivers, TIAs, redrivers, and CPO support ICs—by qualifying comparable designs across CMOS, SiGe, and BCD-CMOS and then pairing that with a geographically distributed OSAT/test flow, which matters as AI optics roadmaps push higher lane rates (including 200G/lane-class electricals) while customers try to reduce single-region capacity and policy risk exposure. Dr. Frank Shi’s background in packaging and manufacturing for optoelectronic devices (including academic work at UC Irvine) lines up with ROCS’s core thesis—treating process choice, packaging/test qualification, and supply continuity as one engineering problem rather than a sourcing afterthought—especially as the industry weighs linear-drive optics and CPO/ELS architectures that tighten analog margin and thermal/power budgets across the full module stack.  

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