Quadric announced a $30 million Series C funding round as its product revenues more than tripled in 2025 compared with 2024, reflecting growing adoption of its on-device AI processor IP across edge LLM, automotive, and enterprise vision markets. The round brings Quadric’s total capital raised to $72 million and comes amid accelerating design-win momentum for its General Purpose NPU architecture.
The Series C round was led by ACCELERATE Fund, managed by BEENEXT Capital Management. Returning investors included Uncork Capital and Pear VC, with new participation from Volta, Gentree, Wanxiang America, Pivotal, and Silicon Catalyst Ventures. Quadric said the round was oversubscribed, signaling continued investor interest in programmable inference architectures for edge deployments.
At the center of Quadric’s portfolio is its Chimera processor IP, a fully programmable GPNPU designed to support both computer vision and on-device large language models on a single architecture. The company positions Chimera as an alternative to fixed-function NPUs, with scalability from 1 TOPS to 864 TOPS and availability in automotive safety-enhanced (ASIL-ready) configurations. Quadric reports customer deployments spanning automotive, autonomous driving software, edge-server LLMs, and office automation, including new license wins in Asia and with Tier IV of Japan.
- $30 million Series C round; $72 million total capital raised
- Product revenues more than tripled in 2025 versus 2024
- GPNPU architecture supports vision and on-device LLMs up to ~30B parameters
- Scales from 1 TOPS to 864 TOPS, including automotive-grade options
- New license wins in edge-server LLM silicon and autonomous driving software
“Quadric is the only AI processor IP company we’ve seen reach this level of product revenue, and that traction is a direct result of real customer adoption—not hype,” said Jeff Clavier, founding partner at Uncork Capital.
🌐 Analysis: The funding round highlights rising demand for programmable inference IP as data center capacity constraints and deployment delays push more AI workloads toward the edge, where power efficiency and flexibility matter most. As AI hardware timelines lengthen and capital intensity rises, insurers and investors increasingly focus on lifecycle risk, favoring architectures that reduce obsolescence risk and improve long-term utilization compared with fixed-function accelerators.