NEW YORK — Qualcomm Technologies used its Investor Day to launch an ambitious data center roadmap centered on AI inference, unveiling the Qualcomm Dragonfly C1000 CPU, Qualcomm High Bandwidth Compute (HBC) memory architecture, the Dragonfly AI300 inference accelerator, advanced connectivity products, and custom silicon offerings. The company simultaneously announced a strategic multi-generation agreement with Meta, which plans to deploy Qualcomm’s Dragonfly C1000 CPUs in future generations of its server infrastructure beginning in the second half of 2028.
The announcements represent Qualcomm’s most significant expansion into data center infrastructure to date. Rather than targeting only AI accelerators, Qualcomm outlined a full-stack strategy spanning CPUs, AI inference processors, memory technologies, optical and electrical interconnects, and customer-specific silicon. The company said its roadmap focuses on the rapidly growing AI inference market, where agentic AI workloads are expected to drive massive increases in token generation and memory bandwidth requirements. Qualcomm believes performance-per-watt and tokens-per-watt will become the primary metrics determining AI infrastructure economics.
Qualcomm’s new Dragonfly portfolio combines technologies developed across its mobile, PC, networking, and communications businesses. The company cited its experience shipping more than 40 billion components globally and leveraging decades of expertise in low-power system-on-chip design, advanced connectivity, memory architectures, and custom processor development. More than 35 ecosystem partners endorsed the initiative, including Arista, Astera Labs, Foxconn, Lenovo, Micron, Quanta, Samsung SDS, SK hynix, Supermicro, VAST Data, and Wistron.
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Qualcomm Dragonfly Data Center Platform
Comprehensive AI Infrastructure Portfolio for Agentic AI, Inference, and Cloud Computing
Updated: June 24, 2026
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| Strategic Focus | Inference-first AI infrastructure optimized for agentic AI, large language models, multimodal AI, and hyperscale cloud deployments with emphasis on tokens-per-watt, memory efficiency, and total cost of ownership. |
| Dragonfly C1000 CPU |
• Custom Qualcomm Oryon CPU architecture • More than 250 CPU cores using a chiplet-based design • Target frequencies exceeding 5 GHz • Designed for agentic AI orchestration, general-purpose cloud computing, and AI head-node workloads • PCIe Gen 7 connectivity exceeding 2 TBps • CXL support for memory expansion and memory disaggregation • Advanced RAS (Reliability, Availability, Serviceability) capabilities • Optimized for high infrastructure utilization and performance-per-TCO • Supports both air-cooled and liquid-cooled deployments • Compatible with OCP ORv3 racks and servers • Commercial availability expected in 2028 |
| High Bandwidth Compute (HBC) |
• Near-memory computing architecture designed specifically for AI workloads • Uses advanced 3D-stacked silicon integration • Addresses AI memory bandwidth and data movement bottlenecks • HBC Gen 1 delivers up to 133 TBps effective memory bandwidth per AI250 card • Represents an 18x increase versus AI200 using LPDDR5X memory • HBC Gen 2 targets a 54x increase versus AI200 • Qualcomm claims up to 6x higher bandwidth-per-watt than HBM-based alternatives • Designed to improve AI inference economics and energy efficiency • Enables larger AI models and more responsive agentic AI deployments • Multi-generation roadmap extending beyond AI250 and AI300 |
| Dragonfly AI300 Accelerator |
• Third-generation AI inference accelerator platform • Successor to Dragonfly AI200 and AI250 • Integrates HBC Gen 2 technology • Supports both air-cooled and direct-liquid-cooled deployments • Designed for LLM, multimodal AI, reasoning engines, and agentic AI workloads • Optimized for high-throughput, low-latency inference • Supports scale-up through UALink and ESUN • Supports scale-out through Ethernet, optical, and copper interconnects • Intended for disaggregated AI inference architectures • Commercial sampling expected in 2028 |
| Custom Silicon Program |
• Customer-specific AI and cloud infrastructure silicon solutions • End-to-end silicon, software, and system co-design services • Advanced packaging and modular architectures • Optimized for performance, power efficiency, and deployment requirements • Supports agentic AI and specialized hyperscale workloads • High-volume manufacturing execution through Qualcomm’s supply-chain ecosystem • Accelerated time-to-market with reduced customer development risk |
| Connectivity Portfolio |
• Die-to-die interconnect technologies • Copper and optical networking solutions • Support for 800G and 1.6T networking links • Active Optical Cable (AOC) support • Active Electrical Cable (AEC) support • Campus-reach optical connectivity up to 20 km (12.4 miles) • Qualcomm SerDes technologies • PAM4 signaling expertise • Coherent-lite DSP technology • Signal integrity optimization • Telemetry and monitoring capabilities • Designed to address AI data movement bottlenecks across distributed infrastructure |
| Meta Partnership |
• Strategic multi-generation agreement with Meta • Dragonfly C1000 selected for future Meta server deployments • Production deployments planned beginning in the second half of 2028 • Supports future Meta AI infrastructure expansion • First publicly announced hyperscale CPU customer for Dragonfly |
| Ecosystem Support | More than 35 ecosystem partners, including Arista, Astera Labs, Cirrascale, Foxconn, Lenovo, Micron, Quanta, Samsung SDS, SK hynix, Supermicro, VAST Data, Viettel IDC, VNPT Group, Wistron, Inventec, Gigabyte, Core42, HUMAIN, and IONOS, have endorsed Qualcomm’s Dragonfly data center roadmap. |
The Meta agreement provides Qualcomm with its first publicly disclosed hyperscale deployment for the Dragonfly CPU roadmap. Qualcomm said the Dragonfly C1000 is planned to power Meta’s next-generation server fleet under a multi-generation collaboration. Production deployments are expected to begin in the second half of 2028 and support future data center expansion projects.
“We designed our data center CPU to deliver leading performance per core and a breakthrough in power efficiency for large scale data center deployments, and this multi-generation agreement with Meta is a significant validation of that approach,” said Cristiano Amon, President and CEO of Qualcomm Incorporated. “We’re thrilled to build on our partnership with Meta, expanding from devices to data center. And this is just the beginning.”
🌐 Analysis
Qualcomm’s data center strategy differs from many competitors because it focuses first on inference economics rather than AI training. The company is betting that the next wave of AI infrastructure spending will be driven by continuous inference workloads generated by AI agents, reasoning engines, retrieval systems, and multimodal services. That emphasis explains Qualcomm’s focus on memory bandwidth, power efficiency, and token throughput rather than simply maximizing raw floating-point performance.
The Meta agreement is arguably the most important announcement. Qualcomm has discussed data center ambitions before, but hyperscale adoption has historically been the critical hurdle. Meta’s decision to include Dragonfly CPUs in future server generations provides Qualcomm with a major validation point and a potential launch customer at enormous scale. It also places Qualcomm into direct competition with incumbent server CPU suppliers while complementing Meta’s broader AI infrastructure strategy involving custom accelerators, GPUs, and heterogeneous compute platforms.
From a networking perspective, Qualcomm is positioning Dragonfly around emerging AI infrastructure standards. Support for UALink and ESUN for scale-up fabrics, combined with 800G and 1.6T optical connectivity, aligns the roadmap with next-generation AI clusters being developed across hyperscale environments. The inclusion of advanced connectivity technologies, custom silicon capabilities, and HBC memory architectures suggests Qualcomm intends to compete not only against traditional CPU vendors, but also against suppliers building integrated AI infrastructure platforms spanning compute, memory, networking, and packaging technologies.
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