Xilinx is preparing to release OTN SmartCORE IP blocks for high capacity combined Ethernet and 100G OTN switching platforms and Packet-Optical Transport Systems (P-OTS) based on its 7 series devices.
The new OTN SmartCORE IP blocks include a group of comprehensive and environmentally agnostic APIs – available to abstract all common and complex functions to aid seamless integration into customer software:
- 100G 1 Stage Multiplexer/Demultiplexer SmartCORE IP – Ultra-compact traffic aggregator, supporting any combination of up to 80 channels of ODUj traffic muxed into or demuxed from a high order ODU4.
- OIF compliant 100G SAR SmartCORE IP – 80 channel segmentation and reassembly core which packetizes ODUjs into packet flows. This enables ODU traffic to be switched through a packet switch fabric, facilitating Packet Optical Transport systems.
- 100G ODUMon SmartCORE IP – A bi-directional IP block used to perform overhead insertion and extraction on up to 80 ODUj channels. Used in conjunction with the Xilinx 128ch OTN Overhead Processor, it enables PM Monitoring, TCM Monitoring and/or TCM Termination and Generation with consequent action insertion for up to 6 levels of TCM on each of the ODUj channels.
Xilinx said its SmartCORE IP part of a roadmap to deliver All Programmable solutions needed to create, differentiate and evolve intelligent 400G and Nx100G OTN solutions and OTN switching platforms.
Xilinx SmartCORE OTN IP Cores for OTN switching will be available September 30th 2013.