PCI-SIG released the latest PCIe Base 3.0 specification. The new PCIe 3.0 architecture is a low-cost, high-performance I/O technology that includes a new 128b/130b encoding scheme and a data rate of 8 gigatransfers per second (GT/s), doubling the interconnect bandwidth over the PCIe 2.0 specification. PCIe 3.0 technology also maintains backward compatibility with previous PCIe architectures and provides the optimum design point for high-volume platform I/O implementations across a wide range of topologies. Possible topologies include servers, workstations, desktop and mobile personal computers, embedded systems, peripheral devices, etc.
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PCIe 3.0 Doubles I/O Interconnect Performance
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From the Technology Graveyard
You just read about PCIe. Here is what it replaced:
SCI (Scalable Coherent Interface) served 1992–2000. What ultimately replaced it?
SCI (Scalable Coherent Interface) provided cache-coherent shared memory across nodes over point-to-point rings, letting a cluster act like a single large NUMA machine. Its job passed to PCIe — but the problem it solved, and the ideas it proved, live on in what replaced it. The standard rests here in the archive. One of 198 technologies here that opened a door and then held it for the next.
On this day
November 17From 25 years of the Converge Digest archive.