Samsung Electronics confirmed that its 5-nanometer (nm) FinFET process technology is complete in its development and ready for customers’ samples.
Compared to 7nm, Samsung’s 5nm FinFET process technology provides up to a 25 percent increase in logic area efficiency with 20 percent lower power consumption or 10 percent higher performance as a result of process improvement to enable us to have more innovative standard cell architecture.
In addition to power performance area (PPA) improvements from 7nm to 5nm, customers can fully leverage Samsung’s highly sophisticated EUV technology. Like its predecessor, 5nm uses EUV lithography in metal layer patterning and reduces mask layers while providing better fidelity.
Another key benefit of 5nm is that we can reuse all the 7nm intellectual property (IP) to 5nm. Thereby 7nm customers’ transitioning to 5nm will greatly benefit from reduced migration costs, pre-verified design ecosystem, and consequently, shorten their 5nm product development.
“In successful completion of our 5nm development, we’ve proven our capabilities in EUV-based nodes,” said Charlie Bae, Executive Vice President of Foundry Business at Samsung Electronics. “In response to customers’ surging demand for advanced process technologies to differentiate their next-generation products, we continue our commitment to accelerating the volume production of EUV-based technologies.”
- In October 2018, Samsung announced the readiness and its initial production of 7nm process, its first process node with EUV lithography technology. The company has provided commercial samples of the industry’s first EUV-based new products and has started mass production of 7nm process early this year.
