OCP: Introducing CXL Memory Pooling
https://youtu.be/3TsYgWaKGuUAstera Labs has demonstrated the industry's first CXL memory pooling solution to reduce memory stranding, optimize memory utilization and reduce ...
In Focus: CXL
| 🖥️ Compute Express Link (CXL) Open Memory Interconnect for AI Infrastructure | |
| Compute Express Link (CXL) is an open, cache-coherent interconnect built on the PCI Express physical layer that enables processors, accelerators, memory devices and storage systems to share memory efficiently. CXL is designed to improve resource utilization and scalability in AI servers, cloud infrastructure and high-performance computing systems. | |
| Why It Matters | AI workloads increasingly demand larger memory pools and faster data sharing between CPUs, GPUs and specialized accelerators. CXL enables memory expansion, pooling and coherent data sharing, helping improve system utilization while reducing memory bottlenecks in next-generation AI infrastructure. |
| Category | Interconnect |
| Key Capabilities | Cache coherency • Memory pooling • Memory expansion • Resource disaggregation • Shared memory • PCIe compatibility • Accelerator connectivity • Rack-scale architecture support |
| Topics Covered | AI Infrastructure • Memory Systems • PCIe • GPU Servers • Data Centers • Rack-Scale Computing • Cloud Infrastructure • High-Performance Computing |
| Key Companies | AMD • Intel • NVIDIA • Astera Labs • Marvell • Broadcom |
| Related Technologies | PCI Express (PCIe) • UALink • NVLink • AI Infrastructure |
| Related Organizations | CXL Consortium • PCI-SIG |
New CXL 3.0 spec doubles the data rate to 64GTs
The CXL Consortium announced the release of the CXL 3.0 specification, doubling the data rate to 64GTs compared to the ...
CXL Consortium releases 2.0 spec for CPU-to-device interconnect
The CXL Consortium, which was formed in 2019 to develop an open industry standard group for high-speed CPU interconnect, announced ...
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