eSilicon tapes out 7nm Combo PHY for high bandwidth memory
eSilicon announced the tapeout of a 7nm test chip to provide silicon validation of its physical interface (PHY) to support ...
In Focus: eSilicon
eSilicon Tapes Out 7nm 400G Gearbox/Retimer Test ASIC
eSilicon announced the tapeout of a 7nm test ASIC that supports 400G gearbox and retimer functionality. Fabrication is expected in ...
eSilicon to move its ASIC and IP design work into Google Cloud
eSilicon will move all of its ASIC and IP design to Google Cloud Platform (GCP) this calendar year. eSilicon has ...
ECOC 2018: eSilicon to show 7nm 56G PAM4 long-reach SerDes
eSilicon plans to demonstrate the silicon performance of its 7nm 56G long-reach SerDes during ECOC 2018 (Anritsu booth #408). eSilicon ...
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