eSilicon tapes out 7nm Combo PHY for high bandwidth memory
eSilicon announced the tapeout of a 7nm test chip to provide silicon validation of its physical interface (PHY) to support ...
Home » eSilicon
eSilicon announced the tapeout of a 7nm test chip to provide silicon validation of its physical interface (PHY) to support ...
eSilicon announced the tapeout of a 7nm test ASIC that supports 400G gearbox and retimer functionality. Fabrication is expected in ...
eSilicon will move all of its ASIC and IP design to Google Cloud Platform (GCP) this calendar year. eSilicon has ...
eSilicon plans to demonstrate the silicon performance of its 7nm 56G long-reach SerDes during ECOC 2018 (Anritsu booth #408). eSilicon ...
© 2023 Converge Digest - A private dossier for networking and telecoms.
© 2023 Converge Digest - A private dossier for networking and telecoms.