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Home » Ricursive Intelligence Raises $300M Series A for AI-Driven Chip Design

Ricursive Intelligence Raises $300M Series A for AI-Driven Chip Design

January 27, 2026
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Ricursive Intelligence announced a $300 million Series A funding round to advance AI software aimed at automating and accelerating semiconductor design workflows. The company is based in the San Francisco Bay Area and positions its technology around recursive self-improvement, where AI systems iteratively optimize both chip architectures and the models that run on them.

Ricursive was founded by Anna Goldie (CEO) and Azalia Mirhoseini (CTO), both of whom previously worked at Google on applying reinforcement learning to chip design. At Google, the founders played central roles in the development of AlphaChip, an AI system used internally to optimize floorplanning and layout for multiple generations of Google’s Tensor Processing Units (TPUs). That work helped demonstrate how machine learning could outperform traditional heuristic-driven approaches in key stages of physical design.

The Series A round was led by Guru Chahal and Ravi Mhatre, with participation from DST Global, NVIDIA’s NVentures, Felicis, Radical Ventures, 49 Palms, and Sequoia Capital. Ricursive said the funding will support expansion of its engineering team, additional compute resources, and deeper engagement with semiconductor partners as it works to bring its AI-driven design approach into production environments.

  • $300M Series A financing round
  • San Francisco Bay Area–based AI semiconductor software company
  • Founded by former Google researchers behind AlphaChip
  • Focus on AI-driven, end-to-end chip design optimization

“We are building a future where the rapid co-evolution of AI and hardware becomes a practical reality,” the company said in its announcement.

🌐 Analysis

The opportunity Ricursive targets is already dominated by the established EDA vendors Cadence Design Systems and Synopsys, both of which control the vast majority of commercial chip design workflows. Cadence and Synopsys have steadily embedded AI into their design suites—through tools such as Cadence’s Cerebrus and Synopsys.ai—focusing on design space exploration, power-performance-area (PPA) optimization, verification productivity, and faster time to signoff. Ricursive’s challenge will be to differentiate its AI-native approach while operating alongside incumbents that already own customer relationships, signoff flows, IP libraries, and foundry-qualified toolchains.

🌐 We’re tracking the latest developments in networking silicon. Follow our ongoing coverage at: https://convergedigest.com/category/semiconductors/

🌐 We’re launching the “Data Center Networking for AI” series on NextGenInfra.io and inviting companies building real solutions—silicon, optics, fabrics, switches, software, orchestration—to share their views on video and in our expert report. To get involved, send a note to [email protected] or [email protected].


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