Google unveiled its next-generation A3 GPU VMs designed for training and serving the most demanding generative AI and large language model applications. Google Compute Engine A3 VMs combine NVIDIA H100...
Qualcomm agreed to acquire Autotalks, a start-up based to Israel developing vehicle-to-everything (V2X) communication technologies. Financial terms were not disclosed. Autotalks is a fabless semiconductor company that has been dedicated...
Mitsubishi Electric has invested in Elephantech, a start-up using metal inkjet printing to mass produce printed circuit boards. Elephantech, which is based in Tokyo, uses its metal inkjet printing and...
NEO Semiconductor, a start-up based in San Jose, California, unveiled its "3D X-DRAM", described at the world's first 3D NAND-like DRAM cell array. Relevant patent applications were published with the...
Marvell Technology announced the appointment of Matt Murphy as Chair of its Board of Directors, replacing Rick Hill, who has served as Chair of the Board since 2016 and who...
Ericsson entered into an agreement with AMD to strengthen the Open RAN ecosystem and vendor-agnostic Cloud RAN environment. The Ericsson-AMD collaboration will see additional processing technologies in the Ericsson Cloud...
Citing steep drops for its Client Computing Group and Data Center and AI groups, Intel reported Q1 revenue of $11.7 billion, down 36% year over year. First-quarter GAAP earnings (loss)...
At its 2023 North America Technology Symposium in Santa Clara, California, TSMC introduced new variants on its 3nm process node while stating that 2nm technology remains on track. Highlights Broader...
Alphawave Semi demonstrated its first connectivity silicon platform on TSMC’s most advanced 3nm process with its ZeusCORE Extra-Long-Reach (XLR) 1-112Gbps NRZ/PAM4 serialiser-deserialiser (SerDes) IP. Alphawave Semi’s silicon platform with 112G...
Cadence Design Systems confirmed the tapeout of its 16G UCIe 2.5D advanced package IP on TSMC’s 3nm (N3E) process technology. Cadence UCIe IP provides an open standard for chiplet die-to-die...
Cadence Design Systems introduced its 112G Extended Long-Reach (112G-ELR) SerDes IP on TSMC’s N4P process for hyperscale ASICs, artificial intelligence/machine learning (AI/ML) accelerators, switch fabric system-on-chips (SoCs) and 5G wireless...
Broadcom began shipping its Jericho3-AI switching siicon chip for delivering high-performance Ethernet for GPU clusters supporting AI workloads. The Jericho3-AI fabric offers 26 petabits per second of Ethernet bandwidth, almost...
The Open Compute Project Foundation (OCP) released of a new chiplet interconnect link layer specification and an evolution of its previously-released Bunch of Wires (BoW) PHY specification. The development of...
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