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Home » Interface Masters develops switch with Intel Tofino 2 + AMD EPYC 2

Interface Masters develops switch with Intel Tofino 2 + AMD EPYC 2

April 13, 2022
in Semiconductors
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Interface Masters Technologies introduced a network switch based on the Intel Tofino 2 P4-programmable switch fabric (12.8Tb) and a Dual AMD EPYC 2 Milan 64-core offload processors.

“Interface Masters is an OEM hardware solutions provider. Our new Tahoe 2664-ZR1 is entirely designed and manufactured in the USA – our hardware is never compromised and always secure,” says Interface Masters VP Product, Brian Shannon. “AMD’s EPYC 2 Milan CPU is a powerhouse and the Intel Tofino 2 switch supports an incredible out-of-the-box software suite. The switch is manufactured, tested and shipped from San Jose, California – and ready for our customer’s software load.”

Software configurations include white box with ONIE SDK and a complete hardware specific SDK tool set for custom development. Intel Deep Insight, Intel P4 Studio SDE, development tools and software partner solutions are available. Interface Masters also currently offers SONiC, DENT and Stratum support for Intel Tofino 2.

http://www.interfacemasters.com

Intel to acquire Barefoot Networks for programmable switch silicon

Monday, June 10, 2019  Barefoot, Intel, Mergers And Acquisitions  

Intel agreed to acquire Barefoot Networks, a start-up developing programmable Ethernet switch silicon and software for use in the data center. Financial terms were not disclosed. Intel said the acquisition will support its focus on end-to-end cloud networking and infrastructure, enabling it to better compete in the Ethernet switching segment. Barefoot, which is based in San Jose, California, is shipping the second generation of its P4-programmable…

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Barefoot’s Tofino 2 chip delivers 12.8 Tbps switching for 32x400GE

Monday, December 10, 2018  400G, Barefoot, P4, Silicon, Switching  

Barefoot Networks is now sampling its Tofino 2 chip, the second generation of its P4-programmable Tofino Ethernet switch application-specific integrated circuit (ASIC) family. Tofino 2 doubles the performance of the first generation Tofino chip, now delivering 12.8 Tbps of packet processing capacity for hyperscale data centers, cloud, enterprise and service provider networks. The device leverages 7nm process technology and is designed for full P4-programmability. Tofino…

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