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Home » Juniper Previews New Core Silicon to Enable 4 Tbps Routers

Juniper Previews New Core Silicon to Enable 4 Tbps Routers

February 3, 2010
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Juniper Networks announced a new generation of silicon that will enable upgrades to existing T Series Core Routers to a full duplex slot capacity of 250 Gbps without service interruption. The new chipset lays the foundation for a total capacity of 4 Tbps in a single, half-rack system. Juniper’s T Series systems are already capable of supporting true line-rate 100 GE interfaces. The new chipset will further enable the scaling of single chassis systems up to 4 Tbps.

Built in 45-nanometer technology, the chipset yields total router throughput surpassing 4 Tbps, far exceeding the performance and scale of off-the-shelf silicon. The chipset includes advanced diagnostic capabilities, auto detection and self-healing, and also incorporates significant power efficiency features to enable more environmentally-conscious data center and service provider networks.

The first trials with products that use the new chipset technology are scheduled for the second half of 2010 and will be available for purchase in early 2011.

Juniper said its unique ability to scale the T Series while in service represents a key component of it’s overall commitment to investment protection, continuous systems availability and operational continuity.

The company noted that it has shipped over 5,500 T Series systems shipped worldwide to date.

“The T Series is fundamentally different from any other router on the market because its architecture was designed to deliver leading core capacity and scale,” said Stefan Dyckerhoff, senior vice president and general manager, Core Business Unit, Juniper Networks. “The chipset we are introducing today is the next step in our core routing strategy, delivering unparalleled investment protection and enabling our customers to continually scale their networks.”http://www.juniper.net

  • In November, Juniper Networks introduced a new 10 port, 10 Gigabit Ethernet (GbE) Physical Interface Card (PIC) for its T1600 Series Core Router. The new interface card, which is expected to ship commercially in Q1 2010, provides the highest density of 10GbE interfaces on a core router so far. It also features a unique Intelligent Oversubscription capability that can be used to aggregate client-facing access interfaces, or to provide efficient connectivity in and between virtualized routers. Intelligent Oversubscription can prioritize services based on a variety of user-configurable characteristics to ensure that mission-critical services are protected even in times of congestion.
  • In October 2009, Juniper Networks unveiled its “Junos One” family of processors that will be embedded into a broad array of Juniper’s future routing, switching and security products. The first product in the set is the “Junos Trio” chipset that features 3D Scaling technology that enables networks to scale dynamically for more bandwidth, subscribers and services while using half as much power per gigabit. Juniper said the new chipset includes more than 30 patent-pending innovations in silicon architecture, packet processing, quality of service and energy efficiency. Built in 65-nanometer technology, Junos Trio includes four chips with a total of 1.5 billion transistors and 320 simultaneous processes, yielding total router throughput up to 2.6 terabits per second and up to 2.3 million subscribers per rack. Junos Trio includes advanced forwarding, queuing, scheduling, synchronization and end-to-end resiliency features, helping customers provide service-level guarantees for voice, video, and data delivery.
  • In June 2009, Juniper Networks announced a 100 Gigabit Ethernet (100 GE) router interface card for its T1600 Core Router. The 100 GE card, which was first demonstrated at Interop Tokyo, leverages technology originally developed to enable the 100-Gbps slots on the T1600 router. The network interface card will comply with the forthcoming 802.3ba specification (ratification is expected in 2010).
Tags: AllJuniperJuniper NetworksPacket Systems
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