Tower Semiconductor and Coherent reported a 400Gbps-per-lane data transmission demonstration using a silicon-based Mach-Zehnder modulator (MZM) fabricated in a production-ready silicon photonics (SiPho) process. The result targets next-generation 3.2T optical transceivers and supports both pluggable optics and co-packaged optics (CPO) architectures for AI-driven data center networks.
The demonstration, presented at OFC 2026, achieved a clear open eye at 420Gbps PAM4 signaling. The setup combined Tower’s silicon photonics platform with Coherent’s indium phosphide (InP) continuous-wave high-power laser. The companies emphasized that the design avoids exotic materials, reinforcing the viability of silicon-based modulators within existing high-volume manufacturing flows.
The milestone reflects growing demand for higher per-lane speeds as AI infrastructure drives exponential bandwidth requirements across data center interconnects. By extending silicon photonics to 400Gbps per lane, the collaboration aims to enable scalable, cost-efficient upgrades toward 3.2T optical modules while leveraging established semiconductor fabrication capacity.
- Demonstration of 400Gbps per lane using silicon MZM in a production SiPho process
- Achieved 420Gbps PAM4 transmission with clear open eye performance
- Uses Coherent InP CW high-power laser integrated with Tower SiPho platform
- Targets next-generation 3.2T optical transceivers for AI data center interconnects
- Avoids use of exotic materials, enabling compatibility with existing fab infrastructure
- Supports both pluggable optics and co-packaged optics (CPO) architectures
“We strongly value the partnership with Coherent and are very excited about this breakthrough,” said Russell Ellwanger, CEO of Tower Semiconductor. “The result can extend the use of silicon for another generation of transceivers, re-utilizing the large multi-fab capacity investments we continue to make while we proceed with our work on more advanced material systems for next-generations.”
| TECHNOLOGY BRIEFING | |
|---|---|
| MZM | Mach-Zehnder Modulator; encodes data by splitting and recombining light with controlled phase shifts |
| PAM4 | Four-level Pulse Amplitude Modulation; doubles spectral efficiency versus NRZ signaling |
| SiPho | Silicon Photonics; integrates optical components on silicon chips using CMOS-compatible processes |
| CPO | Co-Packaged Optics; optical engines integrated directly with switch ASICs to cut power and latency |
| InP CW Laser | Indium Phosphide continuous-wave laser used as the optical source in this demonstration |
🌐 Analysis: This demonstration aligns with a broader industry push toward 400Gbps-per-lane optics, which underpins the transition to 3.2T and future 6.4T optical modules for AI clusters. Competing approaches include thin-film lithium niobate (TFLN), plasmonic modulators, and co-packaged optics architectures from vendors such as Broadcom, Marvell, and NVIDIA ecosystem partners, each targeting improved bandwidth, power efficiency, and signal integrity at scale.
🌐 The emphasis on a production-ready silicon photonics process is notable. While alternative materials may offer higher performance ceilings, silicon remains advantaged in cost, scalability, and integration with CMOS manufacturing. If 400Gbps-per-lane performance can be reliably achieved in silicon, it could extend the lifecycle of existing SiPho platforms and delay the need for more complex and costly material transitions.
