At this week’s SuperComputing Conference (SC23) in Denver, Avicena is demonstrating its 1 Tbps optical transceiver as part its microLED-based LightBundle multi-Tbps chip-to-chip interconnect technology.
Currently, high-bandwidth memory (HBM) modules must be co-packaged with GPUs because the GPU-memory electrical interconnect is limited to just a few millimeters in length. Subsequent HBM generations will require IC shoreline densities in the range of 10 Tbps/mm or more.
Avicena says conventional optical interconnects based on VCSELs or Silicon Photonics (SiPh) promise to extend the interconnect reach but struggle to meet size, bandwidth density, power, latency, operating temperature, and cost requirements. Its microLED-based LightBundle interconnects provide higher bandwidth density, much smaller size, much lower power and latency, and very low costs.
“At Avicena we are excited to showcase the world’s most compact 1Tbps transceiver in the shape of a 3mm x 4mm CMOS ASIC using our patented microLED optical interface,” says Bardia Pezeshki, Founder and CEO of Avicena. “Everyone is talking about SiPh solutions for applications in AI clusters. However, for short reach interconnects with less than 10m reach, we believe that our LED based solution is inherently better suited because the compact size, higher bandwidth density, lower power and latency, and temperature tolerance up to 150°C.”
