Cadence and Intel Foundry announced a multi-year expansion of their collaboration aimed at accelerating design technology co-optimization (DTCO) for Intel’s next-generation manufacturing processes, beginning with Intel 14A. The agreement combines Cadence’s AI-driven electronic design automation (EDA) software and design IP portfolio with Intel Foundry’s process and packaging technologies to help customers optimize future high-performance computing (HPC) and mobile chip designs.
The companies said the collaboration will focus on optimizing design tools, methodologies, and workflows to improve performance, power, and area (PPA) while enabling production-ready process design kits (PDKs) for Intel 14A. Cadence plans to leverage its agentic AI-based design flows and core EDA platforms to accelerate chip development cycles and reduce design risk for customers targeting Intel Foundry technologies.
The announcement deepens a long-standing relationship between the two companies as Intel works to expand its foundry ecosystem and attract external semiconductor customers. Intel Foundry has been investing heavily in design enablement, IP availability, packaging technologies, and EDA partnerships as it prepares future nodes including Intel 18A and Intel 14A for broader industry adoption.
- Multi-year agreement centered on Intel 14A process technology
- Focus areas include DTCO, PDK development, design flows, and IP readiness
- Cadence will deploy agentic AI-driven EDA capabilities to optimize customer designs
- Collaboration targets HPC, AI, and mobile semiconductor applications
- Supports Intel Foundry’s broader ecosystem strategy and customer enablement efforts
“Advancing our relationship with Intel into a much deeper partnership is a major milestone for both companies,” said Anirudh Devgan, president and CEO of Cadence. “This collaboration will leverage the strengths of both companies to empower customers to unlock new levels of performance, power, and efficiency, advance the state of the art and accelerate the realization of next-generation products.”
🌐 Analysis
The announcement builds on a relationship between Cadence and Intel that stretches back decades. Cadence has long supported Intel process technologies through certified design flows, IP development, packaging design tools, and manufacturing enablement programs. As Intel transformed Intel Foundry into a standalone business unit, Cadence became one of the key EDA partners helping establish a competitive foundry ecosystem alongside Synopsys and Siemens EDA.
The partnership gained additional visibility after Lip-Bu Tan joined Intel as CEO in 2025. Tan previously served as CEO of Cadence from 2009 to 2021, overseeing a period of significant growth driven by system design, verification, and AI-enhanced EDA technologies. Following his tenure at Cadence, Tan served as chairman of Intel’s board before stepping down in 2024 and later returning as Intel’s chief executive. His deep relationships across the semiconductor design ecosystem, including Cadence, have been viewed as an asset as Intel works to strengthen partnerships with key EDA, IP, and foundry ecosystem providers.
