Semiconductors

Openness was a big theme at this year's virtual #OFC21 event, with big announcements concerning XR optics, OSFP modules, 800G, disaggregated platforms based on Telecom Infra Project (TIP) designs, and...

GLOBALFOUNDRIES announced an $800 million agreement with GlobalWafers to add 300mm silicon-on-insulator (SOI) wafer manufacturing and expand existing 200mm SOI wafer production at GWC’s MEMC facility in O’Fallon, Missouri. The...

Samsung Electronics introduced its newest radio frequency (RF) technology based on 8-nanometer (nm) process.Samsung’s 8nm RF process technology is the latest addition to an already broad portfolio of RF-related solutions,...

Marvell announced its Atlas 50Gbps PAM4 DSP chipset which integrates transimpedance amplifiers (TIAs) and laser drivers in the CMOS package.The integration of the new Atlas chipset, which is based on...

Marvell has begun sampling the industry's first 1.6T Ethernet PHY with 100G PAM4 electrical input/outputs (I/Os) in 5nm, enabling next-generation 100G serial-based 400G and 800G Ethernet links for high-density switches....

Marvell announced sampling of is new Deneb ultra-low power, multi-mode 400G DSP for disaggregated optical platforms. The new 7nm CDSP for 400G pluggable, which is compatible with its predecessor (Canopus), provides...

TSMC cited progress with its "3DFabric" advanced packaging and chip stacking technologies at the company’s online 2021 Technology Symposium. TSMC will be offering larger reticle-size for both its InFO_oS and CoWoS®...

Arm confirmed that the shipment of a record 7.3 billion Arm-based chips by its silicon partners in the last calendar quarter of 2020, up 22% y-o-y. Arm partners also shipped...

Ampere Computing hosted a technology update event in which it said it on track to deliver by next year new CPU designs with cores designed in-house and optimized for cloud-native...

IBM unveiled a 2 nanometer semiconductor design and process breakthrough based on a new Gate-All-Around (GAA) nanosheet device architecture. The technology is implemented on a 300 millimeter (mm) wafer built...

Samsung Electronics Co. has begun implementing its next-generation 2.5D chip packaging technology Interposer-Cube4 (I-Cube4).Samsung’s I-Cube is a heterogeneous integration technology that horizontally places one or more logic dies (CPU, GPU,...

Intel announced plans to $3.5 billion to equip its New Mexico operations for the manufacturing of advanced semiconductor packaging technologies, including Foveros, its 3D packaging technology.Foveros advanced 3D packaging technology...

Alphawave IP, a start-up offering DSP-based silicon IP building blocks, has filed registration statements for a planned listing on the London Stock Exchange.Recently, Alphawave announced the successful silicon bring up...