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Home » Cavium Intros Chipesets for Next Gen Base Stations

Cavium Intros Chipesets for Next Gen Base Stations

February 28, 2015
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Cavium introduced a family of chipsets designed for a new category of Macrocells and Smart Radio Heads with integrated Layer 1 functionality to enable seamless virtualization of the upper layers in a Cloud RAN deployment. The goal is to support macrocell BTS augmented with Cloud RAN for additional scalability and enterprise small cells for coverage and capacity.

Cavium said current the architecture of the macrocell BTS utilizes a combination of CPUs, DSPs, FPGAs and ASICs which significantly add to the latency, footprint, power consumption and cost. Its new OCTEON Fusion-M processors are single chip solutions for macro BTS and Smart Radio Heads that target next generation radio networks including 3GPP LTE Rel11/12. The key features include highly optimized full custom processor cores, a highly efficient caching subsystem, high memory bandwidth and a very flexible and high performance PHY. Cavium has a long history of delivering high-performance multi-core workload-optimized processors for networking, security and data plane processing applications through their highly successful OCTEON, OCTEON Fusion®, NITROX and Neuron Search processor families.

The CNF75xx family of processors is a full L1-L7 implementation supporting from high capacity picocells at 800 simultaneous users all the way up to multi sector macrocells with up to 3600 simultaneous users. Additionally, multiple OCTEON Fusion-M CNF75xx chips can be cascaded for even denser deployments or higher order MIMO. The CNF 75xx integrates highly optimized custom 64 bit MIPS cores and multiple VLIW DSP engines along with a host of hardware accelerators for the wireless modem pipeline, network processing and traffic shaping. This family is designed to allow system OEMs and operators to build next generation networks in both macrocell and Cloud RAN deployments while retaining the flexibility to evolve into the new 5G standard.

Some highlights:

  • Highly integrated multi-protocol single chip 12 sector 24T24R MIMO with up to 16 cores running up to 2.0 GHz core frequency
  • Simultaneous LTE. LTE-A (FDD/TDD) , HPSA+, GSM operation
  • Supports a range of user counts from 800 user picocell configuration to 3,600 macrocell mode simultaneous active users
  • The first commercially available 3GPP LTE Rel 11 capable (upgradable to Rel 12) SoC
  • Highly configurable Wireless Baseband Module based on VLIW DSP cores, comprehensive PHY hardware accelerators, custom XBAR and PHY Shared memory
  • Integrated I/O capacity including CPRI / JESD204B,10GE, SGMII, SRIO v2.1, PCIe v3.0
  • Very high performance, low latency path for passing COMP data between multiple OCTEON Fusion-M devices

“Cavium has leveraged its multiple generations of world class IP to engineer OCTEON Fusion-M, a highly integrated family of wireless processors that provides a level of integration, performance and power/user unequaled in the industry. The OCTEON Fusion-M family are the most flexible processors for wireless communication and designed to not only encompass existing 3GPP standards but also new versions as they become ratified. They are ideally suited for HetNet applications and 5G roll outs,” said Raj Singh, General Manager of Cavium’s Wireless Broadband Group.

Sampling is expectec in Q3.

http://www.cavium.com

Tags: #MWC15Base StationsBlueprint columnsCaviumSilicon
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