Fujitsu Microelectronics America expanded its portfolio of IP cores for networking, communications and storage system applications, introducing three new macros for custom ASIC designs.
The new macros include Fujitsu’s Serial ATA physical layer storage interface, a 10 Gbps clock data recovery transceiver, and a SerDes macro that is compliant with PCI Express version 1.0a. All three macros can be used in designs built using Fujitsu’s 0.11-micron process technology. The PCI Express SerDes and Serial ATA macros have also been designed to be used in 90-nanometer designs. All macros can be applied in customer-owned tooling (COT) and ASIC designs.
http://us.fujitsu.com/micro/ASIC
