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Home » Marvell Industry Analyst Day: Solving the Connectivity Bottleneck in AI Infrastructure

Marvell Industry Analyst Day: Solving the Connectivity Bottleneck in AI Infrastructure

December 9, 2025
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Marvell Chief Operating Officer Chris Koopmans opened the company’s Industry Analyst Day by emphasizing that hyperscalers are undertaking one of the largest capital investment cycles in history. He noted that total spending on data center infrastructure in 2025 is nearly 400 billion dollars higher than in 2023, eclipsing last year’s already dramatic projections. This surge is reshaping the semiconductor market, which has moved from an 800-billion-dollar 2028 forecast to a one-trillion-dollar outlook within a single year, driven overwhelmingly by AI data center demand rather than consumer devices.

Koopmans argued that the industry has entered an era where the primary bottleneck is no longer compute capacity but connectivity. Modern AI workloads must be partitioned across many processors, making high-speed I/O, SerDes, die-to-die links, memory attach, and optical interconnects essential to overall system performance. He described advanced packaging, chiplets, XPU attach silicon, retimers, active electrical cables, and long-haul optical engines as foundational to scaling AI clusters. Marvell positions itself as one of the few companies capable of supporting every distance and design point, from chip-level communication to data-center-scale optical transport.

Looking ahead, Koopmans said accelerated compute domains will increasingly incorporate switching, moving beyond today’s mostly direct-connected GPU/XPU clusters. He pointed to UALink as a purpose-built protocol for high-bandwidth, low-latency memory access across XPUs, while also noting continued advantages for Ethernet-based switching. Marvell plans to support both approaches, including a 115 Tbps UALink switch expected in the second half of 2026 and its next-generation Ethernet switch families. He added that Marvell’s acquisition of Celestial AI enhances its ability to deliver dense optical chiplets optimized for XPU fabrics, helping expand the switching and optical interconnect opportunity to multiples of today’s market.

• Hyperscaler CapEx rising nearly $400B compared to 2023

• Global semiconductor forecast shifts from $800B (2028 estimate last year) to $1T today

• Reticle limits drive adoption of advanced packaging, chiplets, and optical I/O

• High-speed I/O now central to performance: SerDes, die-to-die fabrics, CXL and PCIe retimers, active copper and optical cables

• Growing need for switching inside accelerated compute clusters; UALink and Ethernet approaches advancing in parallel

• Marvell roadmap includes 115 Tbps UALink switches and next-generation Ethernet portfolios

• Celestial AI acquisition adds high-density optical chiplets for XPU-scale fabrics

• Marvell aims to lead high-speed connectivity across all design distances in the data center

“This isn’t a computing show anymore—it’s a connectivity challenge,” Koopmans said.

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Jim Carroll

Jim Carroll

Editor and Publisher, Converge! Network Digest, Optical Networks Daily - Covering the full stack of network convergence from Silicon Valley

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