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Home » SambaNova Unveils SN50 AI Chip, Secures $350M+, Partners with INTEL

SambaNova Unveils SN50 AI Chip, Secures $350M+, Partners with INTEL

February 24, 2026
in Semiconductors
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 SambaNova introduced its SN50 AI accelerator, a new chip designed to target high-performance inference for agentic AI workloads, while announcing a planned multi-year strategic collaboration with Intel and more than $350 million in Series E funding. The company said the SN50 delivers up to 5X higher maximum speed than competitive chips and reduces total cost of ownership by 3X compared to GPU-based inference platforms. SoftBank Corp. will serve as the first customer, deploying SN50 across next-generation AI data centers in Japan.

Built on SambaNova’s Reconfigurable Data Unit (RDU) architecture, the SN50 increases compute per accelerator by 5X and network bandwidth by 4X over the prior generation. The chip links up to 256 accelerators across a multi-terabyte-per-second interconnect fabric, targeting lower time-to-first-token and higher batch throughput. According to data cited from SemiAnalysis, Llama 3.3 70B runs at 895 tokens per second per user on SN50 at FP8 precision with 1K input/1K output, compared to 184 tokens per second per user on Nvidia’s B200 under similar conditions.

SambaNova and Intel outlined a collaboration spanning AI cloud expansion, integrated infrastructure, and joint go-to-market efforts. Intel plans to make a strategic investment in SambaNova and align Xeon CPUs, accelerators, networking, and storage with SambaNova’s inference systems. The companies aim to position the platform as an alternative to GPU-centric deployments for enterprise and sovereign AI workloads. Proceeds from the Series E round—led by Vista Equity Partners and Cambium Capital with participation from Intel Capital, Battery Ventures, and accounts advised by T. Rowe Price—will fund SN50 production ramp and expansion of SambaCloud.

  • SN50 claims 5X higher max speed and 3X lower total cost of ownership versus GPU-based inference
  • 5X compute increase and 4X network bandwidth over prior-generation RDU
  • Scales to 256 accelerators over multi-terabyte-per-second interconnect
  • SoftBank Corp. to deploy SN50 in AI data centers in Japan for sovereign and enterprise services
  • $350M+ Series E led by Vista Equity Partners and Cambium Capital; Intel Capital participated
  • Planned multi-year Intel collaboration spans AI cloud, integrated infrastructure, and global go-to-market

“AI is no longer a contest to build the biggest model,” said Rodrigo Liang, co-founder and CEO of SambaNova. “With the SN50 and our deep collaboration with Intel, the real race is about who can light up entire data centers with AI agents that answer instantly, never stall, and do it at a cost that turns AI from an experiment into the most profitable engine in the cloud.”

🌐 Analysis: SambaNova positions SN50 squarely at the inflection point where AI infrastructure shifts from training-dominated clusters to inference-dominated production fabrics. As agentic workloads orchestrate multiple models, tools, and long-context reasoning chains, time-to-first-token, sustained tokens per second, and cost-per-token increasingly define platform economics. GPU architectures optimized for dense matrix training must now contend with inference patterns that emphasize concurrency, memory locality, and predictable latency across thousands of simultaneous sessions.

Founded in 2017 by Stanford professors Rodrigo Liang, Kunle Olukotun, and Christopher Ré, SambaNova built its architecture around the Reconfigurable Dataflow Unit (RDU), which departs from traditional SIMD/SIMT GPU execution. The RDU emphasizes dataflow scheduling, large on-chip memory pools, and compiler-driven optimization to minimize off-chip memory traffic. The SN50’s three-tier memory architecture and multi-model resident caching target a core bottleneck in large language model inference: memory bandwidth and context handling. By enabling 10T+ parameter models and 10M+ token context lengths, SambaNova aims to differentiate on memory efficiency and sustained throughput rather than peak FLOPS alone.

Intel’s role adds strategic weight. As Intel expands its AI portfolio across Xeon CPUs, Gaudi accelerators, networking silicon, and advanced packaging, collaboration with SambaNova provides another vector into the inference market without relying solely on internal GPU alternatives. The planned Intel-powered AI cloud aligns with enterprise demand for architectural diversity, particularly among sovereign and regulated deployments seeking supply-chain control and software portability.

SoftBank’s deployment in Japan reinforces sovereign AI momentum across Asia-Pacific. National AI strategies increasingly emphasize domestic control over inference infrastructure, data residency, and cloud sovereignty. By standardizing on SN50 within its next-generation facilities, SoftBank aligns inference performance with national policy objectives and regional enterprise demand.

🌐 We’re tracking the latest developments in networking silicon. Follow our ongoing coverage at: https://convergedigest.com/category/semiconductors/

Tags: InelSambaNova
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Jim Carroll

Jim Carroll

Editor and Publisher, Converge! Network Digest, Optical Networks Daily - Covering the full stack of network convergence from Silicon Valley

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