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Home » Cadence Collaborates with Intel on 14nm Tri-gate Design

Cadence Collaborates with Intel on 14nm Tri-gate Design

June 3, 2014
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Cadence Design Systems announced support for Intel’s 14nm Tri-Gate process technology to enable customers of Intel Custom Foundry. Cadence and Intel have together enabled the custom/analog flow, including Spectre APS, Virtuoso Schematic Editor, Virtuoso Layout Suite and Virtuoso Analog Design Environment for the 14nm Tri-Gate process. The companies are also collaborating on the development of the Cadence digital flow featuring Encounter Digital Implementation System, QRC Extraction Solution, and Tempus™ Timing Signoff Solution.

Cadence is also delivering the LPDDR4-3200 PHY for Intel Custom Foundry’s 14nm Low Power design platform. With data rates of up to 3200Mbps and a 1.6 GHz memory clock, this latest and most advanced memory PHY IP realizes the full capabilities of LPDDR4 technology. Cadence LPDDR4-3200 PHY IP is backward compatible with LPDDR3 memories and supports package on package (POP) and memory on PCB systems, making it ideal for the mobile market, which demands high memory performance, low power, low cost and compact systems.

http://www.cadence.com

http://www.intel.com

Tags: Blueprint columnsCadenceIntelSilicon
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